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Advanced Logic Synthesis. Instructor: Dhiraj Taneja, Broadcom, Hyderabad.

FREE
This course includes
Hours of videos

694 years, 4 months

Units & Quizzes

25

Unlimited Lifetime access
Access on mobile app
Certificate of Completion

The goal of the course is to study the components of digital design and advanced concepts in synthesis process; to understand the importance of technology, libraries, design constraints, design rules; to understand the usefulness of reports with respect to design on Area, Timing and Power. (from nptel.ac.in)

Course Currilcum

    • Lecture 01 – MOS Transistor Unlimited
    • Lecture 02 – MOS Transistor: Detailed Study Unlimited
    • Lecture 03 – Combinational Circuits and Layout Unlimited
    • Lecture 04 – Delay Unlimited
    • Lecture 05 – Sequential Circuits Unlimited
    • Lecture 06 – Logical Effort Unlimited
    • Lecture 07 – Circuit Families Unlimited
    • Lecture 08 – Introduction to Synthesis Unlimited
    • Lecture 09 – Libraries Unlimited
    • Lecture 10 – RTL Coding Synthesis Unlimited
    • Lecture 11 – Reading Design in DC Unlimited
    • Lecture 12 – Design Environment Unlimited
    • Lecture 13 – Design Constraints Unlimited
    • Lecture 14 – Compile Flow and Strategies Unlimited
    • Lecture 15 – Analysis and Reporting Unlimited
    • Lecture 16 – Advanced Synthesis Techniques Unlimited
    • Lecture 17 – Datapath Extraction Guidelines Unlimited
    • Lecture 18 – Power – Methodology and Analysis Unlimited
    • Lecture 19 – Static Timing Analysis – Concepts and Flow Unlimited
    • Lecture 20 – Interconnects and Delay Calculation Unlimited
    • Lecture 21 – Clock and Exceptions Unlimited
    • Lecture 22 – On Chip Variation Unlimited
    • Lecture 23 – Introduction to Crosstalk Unlimited
    • Lecture 24 – Gaussian/Normal Distribution Unlimited
    • Lecture 25 – Equivalence Checking/ Formal Verification Unlimited