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This course is offered to graduates and is a project-oriented course to teach new methodologies for designing multi-million-gate CMOS VLSI chips using high-level synthesis tools in conjunction with standard commercial EDA tools.

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1

English

English [CC]

FREE

Description

The emphasis is on modular and robust designs, reusable modules, correctness by construction, architectural exploration, and meeting the area, timing, and power constraints within standard cell and FPGA frameworks.

Course content

  • Introduction Unlimited
  • Digital Design Using Verilog Unlimited
  • CMOS Technology and Logic Gates Unlimited
  • Verilog Simulation I Unlimited
  • Wires Unlimited
  • Synthesis Unlimited
  • Verilog Simulation II Unlimited
  • Clocking Unlimited
  • Bluespec I: Motivation Unlimited
  • Bluespec II: Designing with Rules Unlimited
  • Bluespec III: Modules and Interfaces Unlimited
  • Bluespec IV: Rule Scheduling and Synthesis Unlimited
  • Bluespec Unlimited
  • Power Unlimited
  • Bluespec V: Processors Unlimited
  • Bluespec VI: Modularity and Performance Unlimited
  • Transaction Level Design and Verification Unlimited
  • Testing Unlimited

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Instructor

Massachusetts Institute of Technology
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