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6.823 is a course in the department’s “Computer Systems and Architecture” concentration.

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English

English [CC]

FREE

Description

6.823 is a study of the evolution of computer architecture and the factors influencing the design of hardware and software elements of computer systems. Topics may include: instruction set design; processor micro-architecture and pipelining; cache and virtual memory organizations; protection and sharing; I/O and interrupts; in-order and out-of-order superscalar architectures; VLIW machines; vector supercomputers; multithreaded architectures; symmetric multiprocessors; and parallel computers.

Course content

    • History of Calculation and Computer Architecture (A) Unlimited
    • Influence of Technology and Software on Instruction Sets: Up to the dawn of IBM 360 (A) Unlimited
    • Complex Instruction Set Evolution in the Sixties: Stack and GPR Architectures (A) Unlimited
    • Microprogramming (A) Unlimited
    • Simple Instruction Pipelining (A) Unlimited
    • Pipeline Hazards (A) Unlimited
    • Multilevel Memories – Technology (J) Unlimited
    • Cache (Memory) Performance Optimization (J) Unlimited
    • Virtual Memory Basics (J) Unlimited
    • Virtual Memory: Part Deux (A) Unlimited
    • Complex Pipelining (A) Unlimited
    • Out of Order Execution and Register Renaming (A) Unlimited
    • Branch Prediction and Speculative Execution (A) Unlimited
    • Advanced Superscalar Architectures (J) Unlimited
    • Microprocessor Evolution: 4004 to Pentium 4 (J) Unlimited
    • Synchronization and Sequential Consistency (A) Unlimited
    • Cache Coherence (A) Unlimited
    • Cache Coherence (Implementation) (A) Unlimited
    • Snoopy Protocols (A) Unlimited
    • Relaxed Memory Models (A) Unlimited
    • VLIW/EPIC: Statically Scheduled ILP (J) Unlimited
    • Vector Computers (J) Unlimited
    • Multithreaded Processors (J) Unlimited
    • Reliable Architectures (J) Unlimited
    • Virtual Machines (J) Unlimited

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Instructor

Massachusetts Institute of Technology
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