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Electrical Engineering 290C: High-Speed Electrical Interface Circuit Design (Spring 2011, UC Berkeley). Instructor: Professor Elad Alon.

FREE
This course includes
Hours of videos

611 years

Units & Quizzes

22

Unlimited Lifetime access
Access on mobile app
Certificate of Completion

This course focuses on the design of the signaling, timing, and peripheral circuitry used in modern high-speed electrical interfaces. The system-level requirements placed on these links by their operating environment will be reviewed and used to highlight the implications on link architecture, performance, and power consumption. Detailed design aspects of high-speed transmitters, receivers, equalizers (transmit, receive, linear, decision-feedback), timing generation and recovery circuits (phase interpolators, PLLs, DLLs), and supporting subsystems (supply regulators, on-chip termination, adaptation) are covered. The course material will be integrated by a final project involving circuit design for a complete high-speed electrical interface.

Course Currilcum

  • Lecture 01 – Introduction Unlimited
  • Lecture 02 – High-Speed Link Environment and Overview Unlimited
  • Lecture 03 – Basic Transmitters and Receivers Unlimited
  • Lecture 04 – Basic Transmitters and Receivers (cont.) Unlimited
  • Lecture 05 – StrongArm Review, Timing Basics Unlimited
  • Lecture 06 – Equalization Techniques Unlimited
  • Lecture 07 – Equalization Techniques (cont.), Link Performance Analysis Unlimited
  • Lecture 09 – Link Performance Analysis (cont.) Unlimited
  • Lecture 10 – Equalizer Design: CTLE, FIR I, FIR II Unlimited
  • Lecture 11 – Equalizer Design: FIR II, Decision Feedback Unlimited
  • Lecture 12 – DFE Design Issues, Equalizer Adaptation Unlimited
  • Lecture 13 – Equalizer Adaptation (cont.) Unlimited
  • Lecture 14 – Timing: PLL/DLL Basics, PLL/DLL Components Unlimited
  • Lecture 15 – PLL/DLL Components, Self-Biasing Unlimited
  • Lecture 16 – Self-Biasing, Timing: Noise and Jitter Unlimited
  • Lecture 17 – Timing: Noise and Jitter (cont.), Timing: CDR Design Unlimited
  • Lecture 20 – Timing: CDR Design (cont.) Unlimited
  • Lecture 21 – Baud-Rate Recovery, Timing: Phase Interpolators Unlimited
  • Lecture 22 – Injection Locking, Support: Supply Regulation Unlimited
  • Lecture 23 – Support: Supply Regulation (cont.) Unlimited
  • Lecture 24 – Support: Supply Regulation (cont.), Mixed-Signal Verification Unlimited
  • Lecture 25 – Mixed-Signal Verification (cont.), Advanced Topics: Multi-Level Signaling Unlimited