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6.896 covers mathematical foundations of parallel hardware, from computer arithmetic to physical design, focusing on algorithmic underpinnings.

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2

English

English [CC]

FREE

Description

Topics covered include: arithmetic circuits, parallel prefix, systolic arrays, retiming, clocking methodologies, boolean logic, sorting networks, interconnection networks, hypercubic networks, P-completeness, VLSI layout theory, reconfigurable wiring, fat-trees, and area-time complexity.

This course was also taught as part of the Singapore-MIT Alliance (SMA) programme as course number SMA 5511 (Theory of Parallel Hardware).

Course content

  • Systolic Computation Unlimited
  • Fast Addition Unlimited
  • Fast Multiplication Unlimited
  • Fast Division Unlimited
  • Matrix Computations Unlimited
  • Retiming Unlimited
  • Retiming II Unlimited
  • Clock Period Unlimited
  • Clock Period II Unlimited
  • Sorting on 1D and 2D Arrays Unlimited
  • Comparison Networks Unlimited
  • Interconnection Networks Unlimited
  • Interconnection Networks II Unlimited
  • Routing Unlimited
  • VLSI Unlimited
  • VLSI II Unlimited
  • VLSI III Unlimited
  • VLSI IV Unlimited
  • VLSI Lowerbounds Unlimited
  • VLSI Layout Unlimited
  • VLSI Wrapup Unlimited
  • Area Universal Networks Unlimited

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Instructor

Massachusetts Institute of Technology
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