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Created by:
Last updated:
September 25, 2023
Duration:
Unlimited Duration
FREE
This course includes:
Unlimited Duration
Badge on Completion
Certificate of completion
Unlimited Duration
Description
Architectural Design of Digital Integrated Circuits. Instructor: Prof. Indranil Hatai, School of VLSI Technology, IIEST Shibpur. Digital arithmetic plays an important role in the design of general-purpose digital processors and of embedded systems for signal processing, graphics, and communications.
In spite of a mature body of knowledge in digital arithmetic, each new generation of processors or digital systems creates new arithmetic design problems. Designers, researchers, and graduate students will find solid solutions to these problems in this course. This course explains the fundamental principles of algorithms available for performing arithmetic operations on digital computers. These include basic arithmetic operations like addition, subtraction, multiplication, and division in fixed-point and floating-point number systems as well as more complex operations such as square root extraction and evaluation of exponential, logarithmic, and trigonometric functions. The algorithms described are independent of the particular technology employed for their implementation. (from nptel.ac.in)
Course Curriculum
- Lecture 01 – Introduction Unlimited
- Lecture 02 – Introduction to VLSI Design Flow Unlimited
- Lecture 03 – Introduction to VLSI Design Flow (cont.) Unlimited
- Lecture 04 – Algorithm to Efficient Architecture Mapping Unlimited
- Lecture 05 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 06 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 07 – Tutorial on Algorithm to Efficient Architecture Mapping Unlimited
- Lecture 08 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 09 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 10 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 11 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 12 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 13 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 14 – Algorithm to Efficient Architecture Mapping (cont.) Unlimited
- Lecture 15 – Efficient Adder Architecture Unlimited
- Lecture 16 – Efficient Adder Architecture (cont.) Unlimited
- Lecture 17 – Efficient Adder Architecture: Carry-Skip Adder, Variable Block Adder Unlimited
- Lecture 18 – Efficient Adder Architecture: Carry-Loolahead Adder (CLA) Unlimited
- Lecture 19 – Efficient Adder Architecture: Delay Optimized CLA Unlimited
- Lecture 20 – Efficient Adder Architecture: Carry-Select Adder Unlimited
- Lecture 21 – Efficient Adder Architecture: Conditional Sum Adder Unlimited
- Lecture 22 – Efficient Adder Architecture: Ling’s Adder, Prefix Adders Unlimited
- Lecture 23 – Efficient Adder Architecture: Running Average Circuit Unlimited
- Lecture 24 – Efficient Adder Architecture (cont.) Unlimited
- Lecture 25 – Pipelining and Parallel Processing Unlimited
- Lecture 26 – Pipelining and Parallel Processing (cont.) Unlimited
- Lecture 27 – Multiplier Architecture Unlimited
- Lecture 28 – Multiplier Architecture: Shift and Add Multiplier Unlimited
- Lecture 29 – Multiplier Architecture: Array Multipliers, Booth Algorithm Unlimited
- Lecture 30 – Multiplier Architecture: Booth Algorithm (cont.) Unlimited
- Lecture 31 – Multiplier Architecture: Booth Algorithm (cont.) Unlimited
- Lecture 32 – Multiplier Architecture: Tree Multiplication Unlimited
- Lecture 33 – Multiplier Architecture: Signed Multiplication Unlimited
- Lecture 34 – Multiplier Architecture (cont.) Unlimited
- Lecture 35 – Squaring Circuit Design Unlimited
- Lecture 36 – Reconfigurable Constant Multiplier Design Unlimited
- Lecture 37 – Reconfigurable Constant Multiplier Design (cont.) Unlimited
- Lecture 38 – Reconfigurable Constant Multiplier Design (cont.) Unlimited
- Lecture 39 – Fixed Point Number Representation Unlimited
- Lecture 40 – Fixed Point Number Representation (cont.) Unlimited
- Lecture 41 – CORDIC Architecture Unlimited
- Lecture 42 – CORDIC Architecture (cont.) Unlimited
- Lecture 43 – CORDIC Architecture (cont.) Unlimited
- Lecture 44 – CORDIC Architecture (cont.) Unlimited
- Lecture 45 – Timing Analysis Unlimited
- Lecture 46 – Timing Analysis (cont.) Unlimited
- Lecture 47 – Timing Analysis (cont.) Unlimited
- Lecture 48 – Logic Hazard Unlimited
- Lecture 49 – FFT Architecture Unlimited
- Lecture 50 – FFT Architecture (cont.) Unlimited
- Lecture 51 – Timing Analysis Basics Unlimited
- Lecture 52 – Timing Analysis Basics (cont.) Unlimited
- Lecture 53 – Timing Analysis Basics (cont.) Unlimited
- Lecture 54 – Timing Issues in Digital IC Design Unlimited
- Lecture 55 – Timing Issues in Digital IC Design (cont.) Unlimited
- Lecture 56 – Timing Issues in Digital IC Design (cont.) Unlimited
- Lecture 57 – Timing Issues in Digital IC Design (cont.) Unlimited
- Lecture 58 – Design Topics for Basic Circuits Design Unlimited
- Lecture 59 – Design Topics for Basic Circuits Design (cont.) Unlimited
- Lecture 60 – Design Topics for Basic Circuits Design (cont.) Unlimited
- Lecture 61 – Design Topics for Basic Circuits Design (cont.) Unlimited
- Lecture 62 – Low Power Digital Design Unlimited
- Lecture 63 – Low Power Digital Design (cont.) Unlimited
- Lecture 64 – Low Power Digital Design (cont.) Unlimited
- Lecture 65 – Low Power Digital Design (cont.) Unlimited
- Lecture 66 – Hardware for Machine Learning: Design Considerations and Tips Unlimited
- Lecture 67 – Hardware for Machine Learning: Design Considerations and Tips (cont.) Unlimited
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