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Last updated:

September 25, 2023

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FREE

This course includes:

Unlimited Duration

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Description

Computer Organization and Architecture. Instructor: Prof. V. Kamakoti, Department of Computer Science and Engineering, IIT Madras.

Computer Architecture talks about the basic digital hardware with which the processor is built and Computer Organization talks about the basic interface the digital hardware gives to the compiler and the operating systems to support the user demands. Study of Application Binary Interface is the subject matter of Computer Organization. How these functionalities are actually implemented is the subject matter of Computer Architecture. This course not only addresses the how and what but also the whys of Computer Architecture and Organization. In this course, Computer Architecture will be dealt in theory and Computer Organization using lab classes. (from nptel.ac.in)

Course Curriculum

  • Lecture 01 – Introduction, High Speed Circuit Design – Recursive Doubling Unlimited
  • Lecture 02 – High Speed Circuit Design – Fast Adder Circuits Unlimited
  • Lecture 03 – Lab 1: Introduction Unlimited
  • Lecture 04 – Fast Addr Circuits (cont.) Unlimited
  • Lecture 05 – Fast Multiplier Circuit Unlimited
  • Lecture 06 – Fast Multiplier Circuit (cont.) Unlimited
  • Lecture 07 – Programming using x86 ISA – Addressing Modes Unlimited
  • Lecture 08 – Programming using x86 ISA – Addressing Modes (cont.) Unlimited
  • Lecture 09 – Floating Point Arithmetic – Precision and Accuracy Unlimited
  • Lecture 10 – Floating Point Arithmetic – Addition, Subtraction and Multiplication Unlimited
  • Lecture 11 – Instruction Set Architecture Unlimited
  • Lecture 12 – Instruction Set Architecture (cont.) Unlimited
  • Lecture 13 – Lab 2: Segmentation Unlimited
  • Lecture 14 – Lab 2: Segmentation (cont.) Unlimited
  • Lecture 15 – Lab 2: Segmentation (cont.) Unlimited
  • Lecture 16 – Orthogonal ISA, C Constructs Mapping, Addressing Modes Unlimited
  • Lecture 17 – Atomic and Predicated Instructions Unlimited
  • Lecture 18 – Atomic and Predicated Instructions (cont.) Unlimited
  • Lecture 19 – General Purpose Registers Unlimited
  • Lecture 20 – Expanding Opcodes Unlimited
  • Lecture 21 – Introduction to Pipelining Unlimited
  • Lecture 22 – Pipelining Unlimited
  • Lecture 23 – Data Hazards Unlimited
  • Lecture 24 – Lab 2: Instruction Scheduling – Static and Dynamic Unlimited
  • Lecture 25 – Dynamic Instruction Scheduling Unlimited
  • Lecture 26 – Dynamic Instruction Scheduling (cont.) Unlimited
  • Lecture 27 – Control Hazard, Branch Prediction Unlimited
  • Lecture 28 – Process Management Unlimited
  • Lecture 29 – Branch Prediction Unlimited
  • Lecture 30 – Global Branch Prediction Unlimited
  • Lecture 31 – Structural Hazard, Architectural Enhancements Unlimited
  • Lecture 32 – Lab 3: Virtual Memory Unlimited
  • Lecture 33 – Locality of Reference, Demand Paging Unlimited
  • Lecture 34 – Page Replacement Algorithm Unlimited
  • Lecture 35 – Multilevel Paging, Translational Lookaside Buffer Unlimited
  • Lecture 36 – Multilevel Paging Unlimited
  • Lecture 37 – Multilevel Paging (cont.) Unlimited
  • Lecture 38 – Page Frame Allocation, Belady’s Anomaly Unlimited
  • Lecture 39 – Paging, Cache Unlimited
  • Lecture 40 – Cache Unlimited
  • Lecture 41 – Cache Organization Unlimited
  • Lecture 42 – Cache – Cache Coherency, Dual Ported Cache Unlimited
  • Lecture 43 – Multilevel Caching, Multitasking Unlimited
  • Lecture 44 – Cache, Degree of Multiprogramming Unlimited
  • Lecture 45 – Shared Memory Architecture Unlimited
  • Lecture 46 – Shared Memory Architecture (cont.) Unlimited
  • Lecture 47 – Virtually Indexed, Virtually Tagged and Physically Tagged Caches Unlimited
  • Lecture 48 – Lab 4: Task Switching Unlimited
  • Lecture 49 – Shared Memory Architecture, Cache Coherence Unlimited
  • Lecture 50 – Concurrent Programming in Hardware Unlimited
  • Lecture 51 – Concurrent Programming in Hardware (cont.) Unlimited
  • Lecture 52 – Conclusion: Recent Trends in Computer Organization and Architecture Unlimited

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