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Description
Digital Circuits and Systems. Instructor: Prof. Shankar Balachandran, Department of Computer Science and Engineering, IIT Madras.
Digital circuits are the basic blocks of modern electronic devices like mobile phones, digital cameras, microprocessors and several other devices. In this course, we will learn the fundamentals of digital circuits and how to engineer the building blocks that go into digital subsystems. We will learn the basics of combinational as well as sequential logic. We will also have a thorough treatment of sequential circuits and state machines. We will also learn how to analyze the performance of digital circuits. The course will emphasize on the design philosophy as well as good design practices used. Students will also get an exposure to Verilog, a popular hardware modeling language. (from nptel.ac.in)
Course Curriculum
- Lecture 01 – Introduction Unlimited
- Lecture 02 – Basic Boolean Logic Unlimited
- Lecture 03 – Boolean Theorems Unlimited
- Lecture 04 – Minterms, Maxterms, Sum of Products (SOP), Products of Sum (POS) Unlimited
- Lecture 05 – Algebraic Minimization Examples Unlimited
- Lecture 06 – Introduction to Verilog Unlimited
- Lecture 07 – Universality, Rearranging Truth Tables Unlimited
- Lecture 08 – Karnaugh Maps Unlimited
- Lecture 09 – K-Map Minimization Unlimited
- Lecture 10 – K-Map with Don’t Cares Unlimited
- Lecture 11 – Minimization of Multiple Output Functions Unlimited
- Lecture 12 – Number Systems Unlimited
- Lecture 13 – Encoders and Decoders Unlimited
- Lecture 14 – Multiplexers Unlimited
- Lecture 15 – Multiplexers based Circuit Design Unlimited
- Lecture 16 – Design Process and Verilog Unlimited
- Lecture 17 – Demonstration of Verilog Unlimited
- Lecture 18 – Sequential Elements Unlimited
- Lecture 19 – Gated Latches Unlimited
- Lecture 20 – Flip Flops Unlimited
- Lecture 21 – Verilog Demonstration: Assign Statement and Instantiation Unlimited
- Lecture 22 – Sequential Circuits Unlimited
- Lecture 23 – Logic Gates and Electrical Properties Unlimited
- Lecture 24 – Delays Unlimited
- Lecture 25 – Sequential Element Delays Unlimited
- Lecture 26 – More Sequential Circuits Unlimited
- Lecture 27 – Instruction to State Machines Unlimited
- Lecture 28 – Always Statement plus Mixing Styles in Verilog Unlimited
- Lecture 29 – State Machines: Sequential Logic Synthesis Unlimited
- Lecture 30 – State Machines: FSM Design Problems Unlimited
- Lecture 31 – State Machines: State Minimization Unlimited
- Lecture 32 – State Machines: State Assignment Unlimited
- Lecture 33 – State Machines: Timing Sequential Circuits Unlimited
- Lecture 34 – Verilog: Sequential Elements Unlimited
- Lecture 35 – Design of GCD Machine and Verilog Implementation Unlimited
- Lecture 36 – GCD Datapath and Controller Unlimited
- Lecture 37 – GCD State Machine Unlimited
- Lecture 38 – GCD Top Level Module plus Datapath Unlimited
- Lecture 39 – Datapath in Verilog Unlimited
- Lecture 40 – Datapath Elements for GCD Unlimited
- Lecture 41 – GCD State Machine in Verilog Unlimited
- Lecture 42 – GCD Testbench Unlimited
- Lecture 43 – Pipelining Unlimited
- Lecture 44 – Pipelining Technology and Methodology Unlimited
- Lecture 45 – Interleaving and Parallelism Unlimited
- Lecture 46 – Verilog Modeling (Assignment Statements) Unlimited
- Lecture 47 – Modeling Circuits with Pipelining Unlimited
- Lecture 48 – Signed Number Representation Unlimited
- Lecture 49 – Addition and Subtraction in 1’s and 2’s Complement Form Unlimited
- Lecture 50 – Ripple Carry Adder Unlimited
- Lecture 51 – Fast Adder Unlimited
- Lecture 52 – Multipliers and Other Circuits Unlimited
- Lecture 53 – Closing Remarks Unlimited
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