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Last updated:

September 25, 2023

Duration:

Unlimited Duration

FREE

This course includes:

Unlimited Duration

Badge on Completion

Certificate of completion

Unlimited Duration

Description

ECE 18-447: Introduction to Computer Architecture (Spring 2014, Carnegie Mellon Univ.). Instructor: Professor Onur Mutlu. Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals.

This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a ARM-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. (from ece.cmu.edu)

Course Curriculum

  • Lecture 01 – Introduction and Basics Unlimited
  • Lecture 02 – Fundamental Concepts and ISA Unlimited
  • Lecture 03 – ISA Tradeoffs Unlimited
  • Lecture 04 – ISA Tradeoffs (cont.) Unlimited
  • Lecture 05 – Single-Cycle and Multi-Cycle Microarchitectures Unlimited
  • Lecture 06 – Multi-Cycle and Microprogrammed Microarchitectures Unlimited
  • Lecture 07 – Pipelining Unlimited
  • Lecture 08 – Data and Control Dependence Unlimited
  • Lecture 09 – Branch Handling and Branch Prediction Unlimited
  • Lecture 10 – Branch Handling and Branch Prediction II Unlimited
  • Lecture 11 – Precise Exceptions Unlimited
  • Lecture 12 – Virtual Memory I Unlimited
  • Lecture 13 – Virtual Memory II Unlimited
  • Lecture 14 – Out-of-order Execution Unlimited
  • Lecture 15 – Load/Store Handling and Data Flow Unlimited
  • Lecture 16 – SIMD Processing (Vector and Array Processors) Unlimited
  • Lecture 17 – GPUs, VLIW, Systolic Arrays Unlimited
  • Lecture 18 – Exam 1 Review Unlimited
  • Lecture 19 – Memory Hierarchy and Caches Unlimited
  • Lecture 20 – Better Caching Unlimited
  • Lecture 21 – Advanced Caching and Memory-Level Parallelism Unlimited
  • Lecture 22 – Main Memory Unlimited
  • Lecture 23 – DRAM and RowClone, TL-DRAM Unlimited
  • Lecture 23 – DRAM and RowClone, TL-DRAM Unlimited
  • Lecture 24 – Memory Scheduling Unlimited
  • Lecture 25 – Main Memory Wrap-Up Unlimited
  • Lecture 26 – Runahead Execution Unlimited
  • Lecture 27 – Prefetching Unlimited
  • Lecture 28 – Multiprocessors Unlimited
  • Lecture 29 – Consistency and Coherence Unlimited
  • Lecture 30 – Performance Predictability, Cache Compression Unlimited
  • Lecture 31 – Interconnection Networks Unlimited
  • Lecture 32 – Asymmetric Multi-Core Unlimited
  • Lecture 33 – Emerging Memory Technologies Unlimited

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